Minimum number of Half adders, Full adders, AND gates required to implement 2 × 3 multiplier is given as

Question

Question

This question was previously asked in

DFCCIL Executive S&T 2018 Official Paper

Answer 1

Explanation:

Multiplier

A multiplier is a combinational logic circuit that we use to multiply binary digits.
We use a multiplier in several digital signal processing applications.
We use it to design calculators, mobiles, processors, and digital image processors.

Process

1) The first product obtained from multiplying A₀ with the multiplicand is called as partial product 1.

2) And the second product obtained from multiplying A₁ with the multiplicand is known as the partial product 2.

The structure of multiplication is explained below

D17

There are 6 product terms so to get all those 6 AND gates are required.

To get the addition of B₁A₀ and B₀A₁ we require one-half adder and this produces a carry also.

To get the addition of B₂A₀, B₁A₁ and C₁ we require Full adder because of 3 inputs and this also produces a carry.

To get the B₂A₁ and C₂ we require one-half adder because of 2 inputs.

Conclusion:

D18

Total 6 AND gates, 2 Half adders and 1 Full adder are required.